Job Details

ID #8253393
State California
City Pasadena
Job type Contract
Salary USD Depends on Experience Depends on Experience
Source Odesus
Showed 2021-01-16
Date 2021-01-12
Deadline 2021-03-13
Category Et cetera
Create resume

FPGA Subject Matter Expert (Validation & Verification Engineer)

California, Pasadena, 91101 Pasadena USA

Vacancy expired!

Very large aerospace and defense contractor in Pasadena, CA is currently seeking a

Field-programmable Gate Array (FPGA) Subject Matter Expert (SME) Engineer to support a space mission projects.

Validation & Verification Systems Engineer - SME high priority The engineer hired for this position will work on FPGA design and verification development. The engineer would interface with the program’s hardware and software team, system engineers and end customer. Activities include test bench development, RTL module development, CDC checks, documentation, and lab testing with help of software.

Minimum Education and Experience:
  • Bachelor’s degree in a computer related engineering field with a minimum of 10 years of experience in complex and large-scale FPGA development and microprocessor verification.

Mandatory Skills
  • Experience with industry standard CAE (computer-aided engineering) tools for electrical engineering as well as EE lab equipment, such as ISE or Vivado, Modelsim or QuestaSim, Oscilloscopes
  • Verilog/VHDL
  • Self-checking testbench development
  • FPGA development flow (ISE or Vivado)
  • Minimum 4 years of Electrical engineering experience and/or education with an emphasis on digital design, including FPGA development.
  • Strong verbal and written communication, presentation, and interpersonal skills with ability to work in team environment

Optional Skills
  • Mentor Questa, Bamboo, GIT, JIRA tools
  • SystemVerilog/UVM
  • GIT
  • SOC development ( PS/PL interface, AXI buses, DMA)
  • C/C, scripting (TCL)
  • High speed SERDES busses (PCIe/Ethernet)

Vacancy expired!

Subscribe Report job