Vacancy expired!
Job Description:Department: Western Digital Technologies, Inc. (USD)HDD CTO AST PreampJob Category: Engineering
Job Title: Senior IC Layout Designer IVDuties: Senior layout designer will be responsible for the layout of high performance analog cores such as amplifiers, buffers, comparators, regulators, analog-to-digital and digital-to-analog converters, PLL, etc. Responsibilities include working with circuit design engineers to physically layout circuit blocks using foundry CMOS process nodes in 22nm and 40nm following best practices from the industry. Job requirements include the following qualifications.Skills: QualificationsThorough knowledge of industry standard EDA tools from CadenceExperience with Mentor and Synopsys desirableExperience with layout of high performance analog blocks such as analog to digital converters, references, digital to analog converters, PLL etc.Experience with floor planning, block level routing and top level chip routingKnowledge of high performance analog layout techniques such as common centroid layout, shielding, use of dummy devices, thermal aware layout with consideration for electromigrationDemonstrated experience with analog layout for silicon chips in mass productionExperience with deep sub-micron design in foundry CMOS nodes. Experience with 40nm and 22nm requiredExperience working with distributed design teams a plusMust possess strong written and verbal communication skillsKeywords: Education: 10+ years of experience in high performance analog layout in advanced CMOS processNo preference on industryVacancy expired!