Vacancy expired!
Hello, We are looking for an Design Verification Principal Engineer having Level 7 Communications, Media & Technology . You can perform Onsite at Austin, San Jose, Phoenix and Remote option is available for the candidates who can travel once a month to San Jose, CA. Travel will be paid. Position : Design Verification Principal Engineer Location : San Jose, CA. Position Type : long term Contract Requirements and Responsibilities:
- The ideal candidate should have 5+ years of CPU verification experience;
- ARM Cortex experience is desirable.
- In-depth knowledge of digital logic design,
- chip architecture and microarchitecture Experience in developing Test Plan /test benches,
- System Verilog/UVM/C-based Test Bench, and writing/debugging tests Experience with advanced verification techniques such as different booting verification, end-to-end verification;
- multiple CPUs verification as part of the IP is desirable.
- Experience in ARM AMBA protocols; AXI4, AHB and APB.
- Experience in silicon bring up a plus Should be a team player with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design
- Engage with the team to drive continuous improvement to the verification env to find more bugs and improve coverage Work as a team to grow together.
- Mentor and coach junior team members
Vacancy expired!