Vacancy expired!
- Hands-on responsibility from synthesis to place and route of a complex GPU block through signoff flows including timing and physical verification.
- Synthesis, Floor plan, Place & Route in chip-level and hierarchical physical implementation environment.
- Running MBIST and DFT insertion into block, understanding impact of MBIST/Scan and debug logic is desirable.
- Interact with RTL counterpart to resolve design issues pertaining to block closure.
- Ability to work independently to make good technical trade-offs between power, area, and timing. Ability to work well in a team setting and drive critical design issues to closure.
- Strong scripting/programming skills in Tcl, Perl, Shell, and/or Python is strongly preferred.
- Synopsys DC/ICC2, Fusion Compiler knowledge is required.
- Solid understanding of Electrical Engineering fundamentals, analytical aptitude and excellent attention to detail
Vacancy expired!