Job Details

ID #8653139
State California
City Sanjose
Job type Contract
Salary USD $80 - $90 80 - 90
Source Technical Link
Showed 2021-01-27
Date 2021-01-26
Deadline 2021-03-27
Category Software/QA/DBA/etc
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ASIC Design Engineer (Contract)

California, Sanjose, 95101 Sanjose USA

Vacancy expired!

  • Experience with high performance digital blocks for mixed signal ICs.
  • Proficient with Verilog-HDL & System Verilog coding.
  • Understanding of high speed DSP applications, clock domain crossing will be helpful.
  • Understanding & exposure to verilog AMS simulation, experience in behavioral models of analog circuit will be plus.
  • Proficient with Cadence tools such as NCVerilog, NCSIM, Simvision. Experience with linting tools (i.e Spyglass) will be helpful.
  • Exposure to SDF annotated simulations with good understanding of parasitic delays and timings is required.
  • Independent, self-motivated with good analytical & communication skills.

Vacancy expired!

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