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The candidate will serve as a Process Engineer Intern/co-op in a 24X7 analog wafer fab producing 150mm & 100mm wafers in BiCMOS, CMOS, and bipolar silicon technologies.  The candidate will work side by side with experienced Process Engineers utilizing statistical analysis such as Design of Experiments (DOE) and Statistical Process Control (SPC) to evaluate and improve cost, yield, and quality metrics. The candidate will be exposed to multiple processes, equipment and metrology utilized in front end wafer manufacturing of silicon wafers.