Vacancy expired!
- Requirements capture
- System architecture development
- IP block configuration
- RTL design in SystemVerilog, Verilog or VHDL
- Functional verification
- Handoff to physical design
- Experience in multi-core processor systems
- Fluent in Verilog/VHDL/System C
- Fluent in Cadence or Synopsys Digital ASIC Tool Suite
- Ability to acquire a security clearance if needed
- Experience working with firmware developers.
- Experience with GPU & neural network inferencing subsystems
- Familiarity with sensor & multi-media subsystems
- Familiarity with hardware security, e.g., encryption, key management, TRNG/DRNG, PUFs, root-of-trust, design obfuscation, etc.
- Familiarity with analog ASICs: Voltage and Current sources, Amplifiers, Converters, PLLs, and Transceivers
Vacancy expired!