Job Details

ID #23750377
State Massachusetts
City Lowell
Job type Permanent
Salary USD Depends on Experience Depends on Experience
Source VIVA USA INC
Showed 2021-12-02
Date 2021-11-23
Deadline 2022-01-22
Category Et cetera
Create resume

Principal FPGA Design Engineer

Massachusetts, Lowell, 01851 Lowell USA

Vacancy expired!

Title: Principal FPGA Design Engineer Mandatory skills:Network Automation, Visio, Data center, multi-tenant data center, TCP/IP, DNS, DHCP, CISCO, CCNA, CCNP, CCDP, routers, Switches, Firewall, Loadbalancer, VMware, multi-tenant data center, L2, L3, Ethernet, IP Communications, IP Description:

Principal FPGA Design EngineerDuties:As a member of our FPGA engineering team in the Broadband Access product line, this role will be instrumental in the design, implementation and integration of RTL for Remote Phy (RxD) cable and Passive Optical Network (PON) products.We work as a multi-disciplinary engineering team on groundbreaking products that delivers high speed connectivity to communications companies around the world.Our engineers collaborate with peers across many engineering fields on the design of outstanding programmable logic based wireline solutions.Our FPGA Engineers participate with hardware, software, and test engineers in bring up, design verification test and end-to-end integration of the final product.As a key member of the advanced area of PON, we will look to you for developing digital interfaces in RxD products, supporting the hardware team on circuit board development, writing FPGA code and supporting thermal simulations/estimations in collaboration with mechanical and electrical engineering team members.Will be encouraged to work with the engineers from other client sites on joint designs and to share the best design practices and tools.Qualifications:Bachelor’s degree in Electronic Engineering/ Computer Science with 12 years of proven experience OR Master’s in Electronic Engineering / Computer Science and eight years of validated experienceExpertise in implementing designs with Verilog &/ or VHDL languages and completing ASIC or FPGA Xilinx and/or Intel designs. Ability to find and correct bugs during simulation, lab and customer deployments as needed. Experience working in a revision-controlled (E.g. ClearCase) environment.Recent hands-on experience in successfully completing development from concept through production and field deployment in one or multiple FPGAs/ ASICs.Responsibility for key parts of the design with traffic management/ scheduling design experience a key advantage.Nice to have:Communication sector experience or knowledge. Some experience in verification for example with System Verilog and Synopsys UVM. Ability to write scripts.TOP SKILLS:Verilog/ VHDL CodingFPGA or ASICTraffic Management or other communication codingData Communications or Telecom experience VIVA USA is an equal opportunity employer and is committed to maintaining a professional working environment that is free from discrimination and unlawful harassment. The Management, contractors, and staff of VIVA USA shall respect others without regard to race, sex, religion, age, color, creed, national or ethnic origin, physical, mental or sensory disability, marital status, sexual orientation, or status as a Vietnam-era, recently separated veteran, Active war time or campaign badge veteran, Armed forces service medal veteran, or disabled veteran. Please contact us at for any complaints, comments and suggestions.

Contact Details : VIVA USA INC.3601 Algonquin Road, Suite 425Rolling Meadows, IL 60008 | http://www.viva-it.com

Vacancy expired!

Subscribe Report job