Additional Skills & Qualifications: 8+ years of industry experience in silicon logic design. Help define and document micro-architecture for assigned blocks on next generation designs. Be responsible for the logic design/RTL entry and timing closure of multiple blocks in a high performance custom CPU Core. Collaborate with the verification team to ensure the implementation meets both architectural and micro-architectural intent. Interface with physical design, design for test, and other teams to optimize tradeoffs within the design.Some additional preferred skills: Experience/Specialization in one or more of the following areas: Branch prediction, instruction/data caches, instruction decode, debug architecture, prefetching, Integer and floating point arithmetic, ALU operations, deeply pipelined out-of-order designs, L0/L1/L2 cache topologies, coherent subsystem design, bus interface including industry standard bus protocols and memory ordering models Substantial background in debugging designs as well as simulation environment. Experience with digital timing analysis, multiple clocks, power, synthesis, place-n-route. Knowledge of verification principles, testbenches, UVM, and coverage. Scripting language such as Python or Perl.Experience Level:Expert LevelAbout Actalent: Actalent connects passion with purpose. Our scalable talent solutions and services capabilities drive value and results and provide the expertise to help our customers achieve more. Every day, our experts around the globe are making an impact. We’re supporting critical initiatives in engineering and sciences that advance how companies serve the world. Actalent promotes consultant care and engagement through experiences that enable continuous development. Our people are the difference. Actalent is an operating company of Allegis Group, the global leader in talent solutions.The company is an equal opportunity employer and will consider all applications without regards to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law.