Vacancy expired!
Project Details: Job Title: Sr. Verification Engineer/RTL Design Engineer Job ID: ITEKJP00023901, ITEKJP00023905 Duration: 6+ months Positions: 1 Location: Hillsboro OR 97124 Client: Intel Incorporation Note:
- Remote with ability to work US Pacific time business hours OR Ronler Acres / Gordon Moore Campus.
- Video Interviews, potential 2 separate interviews including a panel interview.
- "We are seeking experienced RTL design engineer contractors to implement IP for digital blocks, including ARM blocks such as A53 or A55 on leading-edge testchip vehicles.
- Minimum experience with proficiency in defining block level specifications and performing RTL coding for SOC blocks, working with the Physical Design team to optimize physical constraints and timing, and must be well-versed in Pre Silicon verification and debug strategies.
- 10+ years of experience with code quality tools such as Spyglass, LINT, CDC, experience with System Verilog and Perl/TCL/Python.
- Familiarity with Intel's design environment and methodologies such as CTH2 is highly desirable.
- Experience: at least 10 years of experience, Masters degree or BS degree with more work exp in Lieu of masters degree.
Vacancy expired!