FPGA (Emulation Engineer) @ Hillsboro, OR

Position: FPGA (Emulation Engineer) Location: Hillsboro, OR Duration: 6+ Months Qualification Position for an experienced FPGA (Emulation) model engineer to develop, integrate, verify and validate FPGA fast prototype models for the team. Candidates should have the background required which would allow them to start model build support with limited training with FPGA exposure. Ideally we'd have someone that: Has built models for big box emulation (Zebu, Veloce etc) not just a model consumer. Has built models for prototyping systems like HAPS not just a model consumer. Is familiar with PCIe protocol is able to describe basic functionality. Has strong RTL (SystemVerilog) design background. The ideal candidate will demonstrate the following skills: Team player, very proactive and self-motivated Verilog/VHDL coding and verification RTL logic design Logic synthesis Working knowledge of logic design principles, power/timing effects Develop system level test suites suitable for execution on emulators. Develop emulation tools such as debugger and monitor features. Integration of acquired IP blocks into synthesized design Minimum Qualifications - BSEE - preferred MSEE - 5+ years of experience in: ASIC (Logic / RTL Design) experience & back ground with experience in FPGA and Emulation model development FPGA prototyping, silicon verification and system validation Mapping complex SOC design into multi-FPGA platforms and hands on experience with such prototyping systems, e.g. Zebu, Veloce, HAPS 80, Palladium or equivalent Silicon verification, test plan development and execution - 3+ years of experience in: Knowledge of RTL language (e.g. VHDL, Verilog), in-circuit emulation development and FPGA fast prototyping. Understanding of standard interfaces and bus protocols: PCI/USB/ETH/SPI/I2C/PCI-E/SPI/AXI/AMBA Preferred Qualifications - Familiar with Simics Model development for Hybrid/Virtual Platform - System board design/debugging, RTL, lab equipment, e.g. oscilloscopes and logic analyzers - Familiar with pre-Silicon prototyping tools, flows and methodologies