Vacancy expired!
Job Title: ASIC Physical Designers (DRC and LVS) Job Location: Hillsboro, Oregon (Virtual)) Description: Performs all aspects of the SoC design flow and High-Speed CPU implementation from synthesis, place and route, timing and power to create a design database that is ready for manufacturing. This includes: Power/Performance/Area trade-offs with respect to design optimization Floor planning including trade-offs in Macro placements, Power Grid definition, and integration requirements Performs DRC and LVS layout verification activities Good knowledge, understanding, and implementation of DFT features (SCAN, MBIST, etc.) Good knowledge of Formal Verification and Gate Level Simulation May also review vendor capability to support development BS in Electrical Engineering, Computer Engineering, or Computer Science with 7 years of industry experience OR MS degree with 5 years of industry experience.
Vacancy expired!