Job Details

ID #19554020
State Texas
City Austin
Job type Contract
Salary USD TBD TBD
Source Infobahn Softworld Inc.
Showed 2021-09-13
Date 2021-09-13
Deadline 2021-11-11
Category Et cetera
Create resume

Pre Silicon Verification Engineer - OVM & UVM, PCIE @ Austin, TX - Only GC & US Citizens

Texas, Austin, 78746 Austin USA

Vacancy expired!

Job Title: Verification Engineer Location: Austin, TX Duration: 4-8 Months contract Please note: This role will be Remote We are Iooking for an individual to fill a position for a Design Verification engineer. Candidates must have experience performing ASIC verification based on architectural/micro-architectural specification review and analysis followed with definition of - Verification requirements. Educational requirements: BSEE/CE minimum, MS preferred. Minimum Required Qualifications: - 7 plus years of experience in relevant Pre-Silicon verification positions having gone through multiple project cycles to gather in-depth experience. - 4 plus years of experience in logic design verification with various tools and methodologies including System Verilog, Perl, OVM/UVM, logic simulators, and coverage tools. - Experience with using VCS & Verdi for RTL simulation, debug and coverage analysis - Experience specifying and developing test bench components, specifying, developing, and debugging functional tests, and experience specifying, implementing and analyzing functional coverage. - Strong debug abilities, good interpersonal skills and the ability to work in a highly cooperative team environment across many time zones are also desirable. Additional Preferred Qualifications: - Experience with Remote Direct Memory Access protocols eg iWARP or RoCE - Experience with Ethernet, Networking - Experience with PCIE

Vacancy expired!

Subscribe Report job