Vacancy expired!
Description: About GlobalFoundries \: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world's most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. GlobalFoundries is owned by Mubadala Investment Company. For more information, visit www.gf.com . Summary of Role \: GlobalFoundries is looking for an experienced Tapeout Engineer to join the worldwide Global Shuttle Operations (GSO) team in Burlington, VT, US. This is an excellent opportunity for a Tapeout Engineer to grow her or his professional career with a world leading Semiconductor Technology Company. The Global Shuttle Operations team enables customers around the globe to prototype their chip designs on Multi Project Wafers (MPW) and provides all required support to them to make their silicon prototype successful and eventually turn it into a product manufactured at GlobalFoundries. MPW runs are offered by GlobalFoundries for a large variety of technologies, from leading edge FinFet to State-of-the-Art BiCMOS, RF and Silicon Photonics, manufactured in Fabs located in Singapore, US and Germany. The Global Shuttle Operations team belongs to GlobalFoundries Pre-and Post Fab Operations and is a global team with offices in U.S., Singapore, India and Germany. Essential Responsibilities\:
- To work with external and internal customers to successfully tapeout their chip design prototypes on MPW which includes GDS layout review, DRC analysis and DRC waiver closure, and layout design services (dummy fill and metrology insertion) for all technologies offered by GlobalFoundries
- To work with the mask data preparation and Fab teams on mask generation and silicon route setup, which includes preparation of all required tapeout request forms
- To support best-in-class cycle times from customer GDS-in to Masks-in-FAB
- To help drive continuous improvement projects and FMEA to constantly improve the efficiency and quality of Global Shuttle Operations business processes
- To strongly collaborate with the various global teams (including but not limited to) Process Integration and Technology Development, Customer Engineering, Field Engineering and others in order to quickly resolve issues and provide customer or Fab feedback where needed
- Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs
- Master Degree in Electrical Engineering, Computer Science or other relevant engineering disciplines and first relevant experience in the described fields are required
- 3-5 years relevant experience in semiconductor design environments, a general understanding of Silicon tapeout flows from GDS to mask generation
- Language Fluency - English (Written & Verbal)
- Applicant must be a U.S. citizen, lawful permanent resident of the U.S., or a protected individual as defined by 8 U.S.C. 1324b(a) (3),"
- PhD in Electrical Engineering, Computer Science or other relevant engineering disciplines and first relevant experience in the described fields are required
- 6-7 Years Relevant Experience in semiconductor design environments, a general understanding of mask generation and tapeout flows
- Knowledge on physical verification tools like Calibre DRC and LVS, experience in Mentor Calibre LVS/DRC and SVRF rule writing, UNIX based script development and WEB programming skills, Scripting languages as well as analog/mixed-signal design tools like Cadence
- Language Fluency - German (Written & Verbal)
- Semiconductor experience in a foundry environment, preferably in an integration/process or tapeout execution role
- Detail-oriented with first-time right quality output
Vacancy expired!