Verification Engineer intern

Renesas looking for a talented EE graduate student to join our team as a Verification Engineer intern in our Duluth/Johns creek Georgia office. In this role, you will collaborate closely with analog and digital designers to verify the design in a simulation environment. You will be responsible for understanding verification environments for these complex IC designs.Interact with digital and analog engineers to understand the basic functions of a DDR5.Actively assist in all stages of product development including specification, Digital and Analog Design Verification and Silicon debugging.Support coding of simulation infrastructure using Verilog, System Verilog, UVM, Python, and Perl.Set up and maintain Verification Environment, Develop, and Verify self-tested test benches.Work closely with cross-functional teams within the DDR5 development process.Participate in regular meetings and provide updates on project progress.Prepare reports and presentations to communicate findings and progress